Commit version 24.12.13800
This commit is contained in:
@ -1,9 +1,9 @@
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-- Copyright (C) 2018 by HUAWEI TECHNOLOGIES. All rights reserved.
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-- Copyright (C) 2021 by HUAWEI TECHNOLOGIES. All rights reserved.
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--
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-- HUAWEI-CLOCK-MIB.2.17.mib
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-- MIB generated by MG-SOFT Visual MIB Builder Version 4.0 Build 341
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-- Wednesday, March 20, 2013 at 16:03:18
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-- Version: V2.37
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-- Version: V2.41
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--
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HUAWEI-CLOCK-MIB DEFINITIONS ::= BEGIN
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@ -27,7 +27,7 @@
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-- 1.3.6.1.4.1.2011.5.25.186
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hwClockMIB MODULE-IDENTITY
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LAST-UPDATED "201801171200Z" --Jan 17, 2018 at 12:00 GMT
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LAST-UPDATED "202109261200Z" --SEP 26, 2021 at 12:00 GMT
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ORGANIZATION
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"Huawei Technologies Co.,Ltd.
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"
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@ -39,9 +39,31 @@
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Website: http://www.huawei.com
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Email: support@huawei.com
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"
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DESCRIPTION
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"Update the English description of some nodes ."
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REVISION
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"202109261200Z" -- SEP 26, 2021
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DESCRIPTION
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"Add enumeration items."
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REVISION
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"202011241200Z" -- NOV 24, 2020
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DESCRIPTION
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"Add one blank line at the bottom."
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REVISION
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"202008281200Z" -- AUG 28, 2020
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DESCRIPTION
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"Add enumeration items."
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REVISION
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"201908201200Z" -- AUG 20, 2019
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DESCRIPTION
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"To solve the error: defval not in the defined enumeration."
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REVISION
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"201801171200Z" -- Jan 17, 2018
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DESCRIPTION
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@ -188,7 +210,11 @@
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ssua(4),
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ssub(8),
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sec(11),
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dnu(15)
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dnu(15),
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prtc(8194),
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eprtc(8450),
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esec(8715),
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eprc(8962)
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}
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MAX-ACCESS read-write
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STATUS current
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@ -690,7 +716,11 @@
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ssmSsul(3),
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ssmSec(4),
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ssmDnu(5),
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ssmUnknown(6)
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ssmUnknown(6),
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ssmPrtc(7),
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ssmEPrtc(8),
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ssmESec(9),
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ssmEPrc(10)
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}
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MAX-ACCESS read-write
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STATUS current
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@ -755,7 +785,11 @@
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qlSec(2),
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qlSsub(3),
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qlSsua(4),
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qlPrc(5)
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qlPrc(5),
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qlPrtc(6),
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qlEPrtc(7),
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qlESec(8),
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qlEPrc(9)
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}
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MAX-ACCESS read-write
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STATUS current
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@ -1099,7 +1133,10 @@
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{
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nmea(1),
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ubx(2),
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none(3)
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none(3),
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ccsa(4),
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ccsaopt2(5),
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g8271(6)
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}
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MAX-ACCESS read-write
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STATUS current
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@ -1121,7 +1158,7 @@
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STATUS current
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DESCRIPTION
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"Encoding type and frame check format of the extern clock port."
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DEFVAL { 4 }
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DEFVAL { pcm31crc }
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::= { hwClockBitsCfgEntry 16 }
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-- 1.3.6.1.4.1.2011.5.25.186.1.5
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@ -1539,7 +1576,11 @@
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ssmSsub(8),
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ssmSec(11),
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ssmDnu(15),
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ssmInvalid(255)
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ssmInvalid(255),
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ssmPrtc(8194),
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ssmEPrtc(8450),
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ssmESec(8715),
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ssmEPrc(8962)
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}
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MAX-ACCESS accessible-for-notify
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STATUS current
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@ -1557,7 +1598,11 @@
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ssmSsub(8),
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ssmSec(11),
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ssmDnu(15),
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ssmInvalid(255)
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ssmInvalid(255),
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ssmPrtc(8194),
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ssmEPrtc(8450),
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ssmESec(8715),
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ssmEPrc(8962)
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}
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MAX-ACCESS accessible-for-notify
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STATUS current
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@ -2125,7 +2170,11 @@
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prc(2),
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ssua(4),
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ssub(8),
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sec(11)
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sec(11),
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prtc(8194),
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eprtc(8450),
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esec(8715),
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eprc(8962)
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}
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MAX-ACCESS read-write
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STATUS current
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@ -2218,13 +2267,15 @@
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nmea(1),
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ubx(2),
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none(3),
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ccsa(4)
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ccsa(4),
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ccsaopt2(5),
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g8271(6)
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}
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MAX-ACCESS read-write
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STATUS current
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DESCRIPTION
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"1pps bits tod protocol."
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DEFVAL { 2 }
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DEFVAL { ubx }
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::= { hwClockAttributeEntry 15 }
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-- 1.3.6.1.4.1.2011.5.25.186.1.9.1.16
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@ -2234,7 +2285,6 @@
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STATUS current
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DESCRIPTION
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"The frequency signal output squelch flag upon the frequency loss."
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DEFVAL { 2 }
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::= { hwClockAttributeEntry 16 }
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-- 1.3.6.1.4.1.2011.5.25.186.1.9.1.17
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@ -2245,13 +2295,17 @@
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ssua(4),
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ssub(8),
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sec(11),
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dnu(15)
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dnu(15),
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prtc(8194),
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eprtc(8450),
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esec(8715),
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eprc(8962)
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}
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MAX-ACCESS read-write
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STATUS current
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DESCRIPTION
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"The squelch threshold of the external input source."
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DEFVAL { 15 }
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DEFVAL { dnu }
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::= { hwClockAttributeEntry 17 }
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-- 1.3.6.1.4.1.2011.5.25.186.1.10
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@ -2521,7 +2575,11 @@
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ssub(8),
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sec(11),
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dnu(15),
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unknown(16)
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unknown(16),
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prtc(8194),
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eprtc(8450),
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esec(8715),
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eprc(8962)
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}
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MAX-ACCESS read-create
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STATUS current
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@ -2610,7 +2668,7 @@
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STATUS current
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DESCRIPTION
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"The SA bit of E1 Port SSM information."
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DEFVAL { 4 }
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DEFVAL { sa4 }
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::= { hwClockSrcCfgEntry 15 }
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@ -2650,7 +2708,11 @@
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sec(11),
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dnu(15),
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unknown(16),
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invalid(99)
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invalid(99),
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prtc(8194),
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eprtc(8450),
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esec(8715),
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eprc(8962)
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}
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MAX-ACCESS read-only
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STATUS current
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ssub(8),
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sec(11),
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dnu(15),
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unknown(16)
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unknown(16),
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prtc(8194),
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eprtc(8450),
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esec(8715),
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eprc(8962)
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}
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MAX-ACCESS read-create
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STATUS current
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@ -3106,7 +3172,7 @@
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MAX-ACCESS not-accessible
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STATUS current
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DESCRIPTION
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"The CES ACR domain infomation table."
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"The CES ACR domain information table."
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::= { hwClockManageObjects 14 }
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@ -3116,7 +3182,7 @@
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MAX-ACCESS not-accessible
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STATUS current
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DESCRIPTION
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"The entry of CES ACR domain infomation table."
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"The entry of CES ACR domain information table."
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INDEX { hwClockCesAcrDomianInfoSlot, hwClockCesAcrDomianInfoCard, hwClockCesAcrDomianInfoDomain }
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::= { hwClockCesAcrDomainInfoTable 1 }
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@ -3207,7 +3273,7 @@
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MAX-ACCESS not-accessible
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STATUS current
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DESCRIPTION
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"The CES ACR domain infomation table."
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"The CES ACR domain information table."
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::= { hwClockManageObjects 15 }
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-- 1.3.6.1.4.1.2011.5.25.186.1.15.1
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@ -3525,7 +3591,7 @@
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MAX-ACCESS read-only
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STATUS current
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DESCRIPTION
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"This object indicates the signal-to-noise ratio of the tracing satellite for the SmartClock module. If the module is not installed, the default value is invalid."
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"This object indicates the signal-to-noise ratio of the syncing satellite for the SmartClock module. If the module is not installed, the default value is invalid."
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::= { hwClockSmartClockPortCfgEntry 17 }
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-- 1.3.6.1.4.1.2011.5.25.186.1.16.1.18
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